Experiment C4: Current-Mode Control of a Buck Converter

🎯 Objective

By the end of this lab, students will be able to:

This experiment focuses on implementing current-mode control in a buck converter and exploring its unique dynamic behavior. By introducing an inner current loop, students will observe improved transient response as well as instability phenomena such as subharmonic oscillation, and learn how ramp (slope) compensation stabilizes the system.

• Implement and test a current-mode controlled buck converter with an inner inductor current loop.
• Vary the load resistance to see its impact on the output voltage transient.
• Observe the onset of subharmonic oscillation at higher duty ratios, and identify the conditions under which the system becomes unstable.
• Apply ramp (slope) compensation and evaluate its effect on stabilizing the converter and restoring periodic operation.
• Analyze how current-mode control shapes the converter dynamics, including transient response and steady-state behavior.

📚 Prerequisite

• Experiment A1, A2, A3, C1, and C2.
• Basic understanding of the Nyquist plot and the Nyquist Stability Criterion
• Concept of gain margin and phase margin

🧠 Theory

In the last experiment, we have seen that we can regulate the output voltage of buck converter in a decent way. While the controller can be tuned based on the performance criteria, a trade off exist of increasing complexity to improving performance.

A couple of things to observe....(1) the converter inherently has a discrete time feature like a sampled system...ie. no matter what the controller does, the change to the converter happens once per switching interval. In our previous example, we kind of put this feature under the rug and ensure validity of the controller, by making the bandwidth close to 1/10 of the switching frequency where our average model has better fidelity. (2) though the inductor current is a state variable in this system, we didnt take advantage of controlling it yet. As you can see in the figure below, with a step change in reference for a voltage mode control, the inductor current behaved as a byproduct of the control action. We designed our controller looking at the plant transfer function from duty ratio to output voltage.

What if we could take advantage of inductor current measurment, can we inmprove the control performance which can be measured using the rise or settling time without increasing the overshoot? This is where current mode control comes in. In this experiment, we would focus on controlling the inductor current. It may not be apparent yet how does this help in improving the output voltage control performance, we will have to wait for the next lab where we will make the control architecture such that we will have two control loops--one to control the output voltage (outer loop) and one to control the inductor current (inner loop). The outer loop will set the reference for the inner loop. But hold your horses! let us first understand current mode control, where our objective is to control the inductor current.

Let us start from the basics. Let us focus this time on how the inductor current behaves if we give a step change in duty ratio, as shown in Fig. 2. The duty ratio is kept constant.

If we mark the time axis with instances t1, t2, t3...marking when the top switch transition from on to off and off to on. We will call these instance as k=1, 2, 3, 4, .... As we are operating over a constant switching frequency, t3 - t1 = t5-t3 = tn+2-tn = Tsw. Obviously, we are going through some transients in the intitial stage as output voltage settles to some steady state from initial zero voltage. Also the inductor current values at each of these instances keeps changing until steady state is reached at which point the peak and valley of the inductor current remains constant (our definition of periodic steady state). OR in other words, i(1) is not eual i(3) is not equal to i(5)....however, iL(50) = iL(52), iL(51) = iL(53) and so on...Given the discrete nature of the evolution, we can describe the evolution of the inductor current using difference equations rather than a differential equation.

What if instead of turning the switch off after a constant on time, we create a control law, such that the switch turns on at a finite interval determined by a clock with fixed frequency but turns off when the inductor current reaches a reference peak (a.k.a peak current mode control), as shown below.

A few interesting observation appears if we compare Fig. 1 and Fig. 2.

Feature	Step Duty (Fig 1)	Peak Current Mode (Fig 2)
Control	Open-loop	Closed-loop (inner current)
System order (Output voltage behavior)	2nd order (L + C)	~1st order behavior
Inductor current	Uncontrolled, large swings	Regulated, bounded
Output voltage	Overshoot + ringing	Smooth, monotonic

While the response is encouraging, it begs the following question is this peak current mode control stable under all condition? In order to investigate stability, let us find a discrete-time map of the inductor current at each time steps.

In each switching period:

• clock turns the switch ON
• inductor current rises with slope
• when sensed current reaches the control threshold, switch turns OFF
• then current falls with slope

For a buck converter,

Let:

• = switching period
• = duty ratio
• = inductor current at the beginning of cycle , just after clock turns the switch ON
• = current threshold at which switch turns OFF

During ON interval:

Turn-off occurs when current hits the threshold:

So ON time in cycle is

After turn-off, current falls for the remainder of the cycle:

with slope . Therefore the next cycle starts with

Substitute :

Simplify:

This is a first-order discrete-time map:

This already tells us something deep:

• the coefficient multiplying is negative
• so perturbations alternate sign from cycle to cycle

Now let us examine the perturbation dynamics.

Let be the steady-state beginning current.

Define the perturbation:

Subtract the steady-state equation from the full map. The constant term cancels, giving

This is the central result.

The perturbation evolves according to the multiplier

For discrete-time stability, we need

Therefore stability requires

equivalently in standard discrete-time form,$$\boxed{ \frac{i_L(z)}{i_{ref}(z)} = \frac{1 + \frac{m_2}{m_1}}{1 + \frac{m_2}{m_1} z^{-1}}. }$$iref​(z)iL​(z)​=1+m1​m2​​z−11+m1​m2​​​.​ Here Iref is Ipeak what we are setting.

This result shows that the inner current loop behaves as a first-order discrete-time system with a pole at$$z = -\frac{m_2}{m_1}.$$z=−m1​m2​​.

The speed at which the inductor current converges to its reference is governed by the ratio of the falling and rising slopes of the current waveform. When the down-slope $m_2$m2​ is much smaller than the up-slope $m_1$m1​, the ratio $m_2/m_1$m2​/m1​ is small, and any perturbation in the current decays rapidly from one switching cycle to the next. In this case, the system corrects errors efficiently, leading to fast convergence toward the desired operating point.

When $\left|\frac{m_2}{m_1}\right| < 1$​m1​m2​​​<1 (i.e., $D < 0.5$D<0.5), the pole lies inside the unit circle and the current tracks its reference. When $\left|\frac{m_2}{m_1}\right| > 1$​m1​m2​​​>1, the pole lies outside the unit circle, leading to subharmonic oscillation and loss of current tracking.

For a buck converter this directly translates to a duty ratio less than 0.5. See below three figures...one with stable..one at the onset of subharmonic osicllation (not the perturbation persist except it changes sign) ...and the last one with subharmonic oscillations....use the code on the right side to play with the

The impact of this subharmonic oscialltions include increase ripple at the output, loss of predictable behaviour, increased stress, EMI, escalate to chaos, as well as

Next, question can we operate for situations that require more than 50% duty ratio...for example during transients...or during steady state.

During one cycle:

• ON slope:

$$m_1 = \frac{V_{in}-V_o}{L}$$m1​=LVin​−Vo​​

• OFF slope:

$$m_2 = \frac{V_o}{L}$$m2​=LVo​​

Let:

• $i_n$in​: valley current at start of cycle
• $i_{n+1}$in+1​: next valley current

In peak current-mode control, the switching instant is determined by comparing the inductor current to a reference signal. During the ON interval, the inductor current increases linearly with slope $m_1 = (V_{in} - V_o)/L$m1​=(Vin​−Vo​)/L, while during the OFF interval it decreases with slope $m_2 = V_o/L$m2​=Vo​/L. In the absence of any additional compensation, the switch turns off when the inductor current reaches a fixed reference value. This creates a cycle-by-cycle discrete-time system in which the valley current at the beginning of one cycle determines the valley current in the next cycle.

When the duty ratio exceeds 0.5, the down-slope $m_2$m2​ becomes larger than the up-slope $m_1$m1​. Under these conditions, small perturbations in the inductor current do not decay but instead grow from one cycle to the next, often alternating in sign. This results in subharmonic oscillation, where the waveform repeats every two switching cycles rather than every cycle. The converter loses its periodic steady-state behavior, leading to degraded regulation, increased ripple, and potential stress on components.

To suppress this instability, a compensation ramp is added to the current feedback signal (or equivalently to the reference). The switching condition is modified to compare $i_L(t) + m_a t$iL​(t)+ma​t with a constant reference, where $m_a$ma​ is the slope of the artificial ramp. This effectively increases the slope seen by the comparator during the ON interval from $m_1$m1​ to $m_1 + m_a$m1​+ma​. As a result, the sensitivity of the switching instant to perturbations in current is reduced.

A small-signal analysis of the cycle-to-cycle dynamics shows that the evolution of perturbations can be described by a linear difference equation of the form$$\Delta i_{n+1} = \lambda \Delta i_n,$$Δin+1​=λΔin​,

where the gain $\lambda$λ depends on the inductor slopes and the compensation ramp. With ramp compensation, this gain becomes$$\lambda = \frac{m_a - m_2}{m_1 + m_a}.$$λ=m1​+ma​ma​−m2​​.

For the system to be stable, the magnitude of $\lambda$λ must be less than unity. This leads to the well-known design condition that the compensation slope must satisfy$$m_a \ge \frac{m_2}{2}.$$ma​≥2m2​​.

Physically, this condition ensures that the artificial ramp partially counteracts the steep down-slope of the inductor current, preventing perturbations from growing. A commonly used and near-optimal choice is $m_a = m_2/2$ma​=m2​/2, which provides adequate stability while maintaining fast current-loop dynamics. If the ramp is too small, subharmonic oscillation persists; if it is too large, the system becomes over-damped and begins to resemble voltage-mode control, reducing the advantages of current-mode operation.

Thus, ramp compensation plays a critical role in ensuring stable and predictable operation of current-mode controlled converters, particularly at higher duty ratios where subharmonic oscillation would otherwise occur.

Comparator condition:$$i_L(t) + m_a t = I_{ref}$$iL​(t)+ma​t=Iref​

During ON:$$i_L(t) = i_n + m_1 t$$iL​(t)=in​+m1​t

So:$$i_n + m_1 t_{on} + m_a t_{on} = I_{ref}$$in​+m1​ton​+ma​ton​=Iref​ $$t_{on} = \frac{I_{ref} - i_n}{m_1 + m_a}$$ton​=m1​+ma​Iref​−in​​

At turn-off:$$i_{pk} = i_n + m_1 t_{on}$$ipk​=in​+m1​ton​

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During OFF:$$i_{n+1} = i_{pk} - m_2 (T_s - t_{on})$$in+1​=ipk​−m2​(Ts​−ton​)

Substitute:$$i_{n+1} = i_n + m_1 t_{on} - m_2 (T_s - t_{on})$$in+1​=in​+m1​ton​−m2​(Ts​−ton​) $$i_{n+1} = i_n + (m_1 + m_2)t_{on} - m_2 T_s$$in+1​=in​+(m1​+m2​)ton​−m2​Ts​

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$$i_{n+1} = i_n + (m_1 + m_2)\frac{I_{ref} - i_n}{m_1 + m_a} - m_2 T_s$$in+1​=in​+(m1​+m2​)m1​+ma​Iref​−in​​−m2​Ts​

Let:$$i_n = i^* + \hat{i}_n$$in​=i∗+i^n​

Then:$$\hat{i}_{n+1} = \lambda \hat{i}_n$$i^n+1​=λi^n​

After differentiation:$$\lambda = 1 - \frac{m_1 + m_2}{m_1 + m_a}$$λ=1−m1​+ma​m1​+m2​​

Simplify:$$\lambda = \frac{m_a - m_2}{m_1 + m_a}$$λ=m1​+ma​ma​−m2​​

$$|\lambda| < 1$$∣λ∣<1

Focus on worst case (negative λ → oscillation):$$-1 < \frac{m_a - m_2}{m_1 + m_a}$$−1<m1​+ma​ma​−m2​​

Solve:$$m_a > \frac{m_2 - m_1}{2}$$ma​>2m2​−m1​​

For buck converter

Since:$$\frac{m_2}{m_1} = \frac{D}{1-D}$$m1​m2​​=1−DD​

Worst case at high duty:$$\boxed{ m_a \ge \frac{m_2}{2} }$$ma​≥2m2​​​

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Without ramp

$$\lambda = -\frac{m_2}{m_1}$$λ=−m1​m2​​

→ unstable if $D > 0.5$

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With ramp:

$$\lambda = \frac{m_a - m_2}{m_1 + m_a}$$λ=m1​+ma​ma​−m2​​

→ ramp reduces magnitude of λ

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$$m_a = \frac{m_2}{2}$$ma​=2m2​​

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Also:$$\boxed{ m_a = \frac{m_2}{2} }$$ma​=2m2​​​

Why?

• fast decay of perturbations
• avoids over-damping
• preserves current-mode benefits

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$$m_a < \frac{m_2}{2}$$ma​<2m2​​

→ subharmonic oscillation

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$$m_a \gg m_2$$ma​≫m2​

→ behaves like voltage-mode:

• slower response
• reduced benefit of current loop

Outer loop model:

Outer Voltage Loop Modeling in Current-Mode Control

In a buck converter operating under peak current-mode control, the inductor current is regulated on a cycle-by-cycle basis by an inner control loop. When this inner loop is sufficiently fast and stable (ensured by proper ramp compensation), the inductor current can be treated as a controlled input to the output stage. This allows the outer voltage loop to be modeled independently of the inductor dynamics.

The output stage of the converter consists of the capacitor and load resistance. Applying Kirchhoff’s current law at the output node gives$$C \frac{dV_o}{dt} = i_L - \frac{V_o}{R}.$$CdtdVo​​=iL​−RVo​​.

To analyze the dynamics, we linearize this equation around a steady-state operating point. Let $V_o = V_o^* + \hat{v}_o$Vo​=Vo∗​+v^o​ and $i_L = I_L^* + \hat{i}_L$iL​=IL∗​+i^L​, where the hat variables represent small perturbations. Substituting and neglecting higher-order terms yields$$C \frac{d\hat{v}_o}{dt} = \hat{i}_L - \frac{\hat{v}_o}{R}.$$Cdtdv^o​​=i^L​−Rv^o​​.

Taking the Laplace transform,$$C s \hat{V}_o(s) = \hat{I}_L(s) - \frac{\hat{V}_o(s)}{R}.$$CsV^o​(s)=I^L​(s)−RV^o​(s)​.

Rearranging,$$\hat{V}_o(s)\left(Cs + \frac{1}{R}\right) = \hat{I}_L(s),$$V^o​(s)(Cs+R1​)=I^L​(s),

which leads to the transfer function from inductor current to output voltage:$$\frac{\hat{V}_o(s)}{\hat{I}_L(s)} = \frac{1}{Cs + \frac{1}{R}}.$$I^L​(s)V^o​(s)​=Cs+R1​1​.

Thus, the output stage behaves as a first-order system with a single pole at $\omega_p = \frac{1}{RC}$ωp​=RC1​.

We saw that in figure 2.....

When a step change is applied to the current reference in a buck converter, the response of the inductor current depends strongly on the output voltage. In the limiting case where the output voltage is zero, the inductor current does not decay during the OFF interval, since the down-slope $m_2 = V_o/L$m2​=Vo​/L is zero. As a result, the current reaches the reference within a single switching cycle and remains there, exhibiting ideal one-cycle tracking with no interaction from the output stage. However, as soon as the output voltage becomes nonzero, the situation changes fundamentally. The inductor current now decays during the OFF interval, and this decay is directly proportional to $V_o$Vo​. Consequently, the next-cycle valley current depends not only on the reference but also on the output voltage. This introduces a coupling between the inner current loop and the outer voltage dynamics: the current influences the output voltage through the capacitor and load, while the output voltage simultaneously affects the current loop through the inductor slopes. Thus, even though current-mode control simplifies the system by regulating the peak current, the dynamics of the inner loop are inherently linked to the output voltage, and complete decoupling is only an approximation valid when the output voltage varies slowly or remains small.

Practical Implementation:

Case Study: Ramp Compensation in Peak Current-Mode Control

Consider a buck converter with:$$V_{in}=10\text{ V}, \quad L=30\mu H, \quad C=30\mu F, \quad f_s=50\text{ kHz}$$Vin​=10 V,L=30μH,C=30μF,fs​=50 kHz

The current sensor gain is:$$K_s = 660\text{ mV/A}=0.66\text{ V/A}$$Ks​=660 mV/A=0.66 V/A

The output voltage may vary from 0 to 10 V. The load resistance can vary, but the ramp-compensation requirement is mainly determined by the inductor current slopes, not directly by $R$R.

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1. Current slopes

During the ON interval, the inductor current rises with slope$$m_1=\frac{V_{in}-V_o}{L}$$m1​=LVin​−Vo​​

During the OFF interval, it falls with slope$$m_2=\frac{V_o}{L}$$m2​=LVo​​

As $V_o$Vo​ increases, $m_1$m1​ decreases and $m_2$m2​ increases. This is why high-duty-ratio operation is more prone to subharmonic oscillation.

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2. Stability without ramp compensation

Without ramp compensation, the cycle-to-cycle perturbation evolves as$$\Delta i_{n+1}=-\frac{m_2}{m_1}\Delta i_n$$Δin+1​=−m1​m2​​Δin​

For stability,$$\left|\frac{m_2}{m_1}\right|<1$$​m1​m2​​​<1

For a buck converter,$$\frac{m_2}{m_1}=\frac{V_o}{V_{in}-V_o}$$m1​m2​​=Vin​−Vo​Vo​​

So stability without ramp requires$$V_o < \frac{V_{in}}{2}$$Vo​<2Vin​​

For your 10 V input:$$V_o < 5\text{ V}$$Vo​<5 V

Thus, without ramp compensation, peak current-mode control is naturally stable below 5 V output but becomes prone to subharmonic oscillation above 5 V.

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3. Required ramp compensation

Ramp compensation modifies the switching condition from$$i_L=i_{ref}$$iL​=iref​

to$$i_L+m_a t=i_{ref}$$iL​+ma​t=iref​

where $m_a$ma​ is the artificial ramp slope in A/s.

A common design choice is$$m_a=\frac{m_2}{2}$$ma​=2m2​​

or$$m_a=\frac{V_o}{2L}$$ma​=2LVo​​

This is the “half down-slope” rule.

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4. Convert ramp slope into sensor voltage

Your comparator sees the current-sensor voltage, not current directly:$$v_{sense}=K_s i_L$$vsense​=Ks​iL​

So the required compensation ramp slope in volts per second is$$m_{a,V}=K_s m_a$$ma,V​=Ks​ma​

Substituting:$$m_{a,V}=K_s\frac{V_o}{2L}$$ma,V​=Ks​2LVo​​

The ramp amplitude over one switching period is$$V_{ramp}=m_{a,V}T_s$$Vramp​=ma,V​Ts​

where$$T_s=\frac{1}{50\,000}=20\mu s$$Ts​=500001​=20μs

Therefore,$$\boxed{ V_{ramp}=K_s\frac{V_o}{2L}T_s }$$Vramp​=Ks​2LVo​​Ts​​

Substitute $K_s=0.66$Ks​=0.66, $L=30\mu H$L=30μH, and $T_s=20\mu s$Ts​=20μs:$$V_{ramp}=0.66\cdot\frac{V_o}{2(30\mu H)}\cdot 20\mu s$$Vramp​=0.66⋅2(30μH)Vo​​⋅20μs $$\boxed{ V_{ramp}\approx 0.22V_o }$$Vramp​≈0.22Vo​​

So the required ramp amplitude is about 22% of the output voltage.

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5. Example values

Output Voltage $V_o$Vo​	Duty Ratio $D$D	Stability Without Ramp	Recommended Ramp $V_{ramp}$Vramp​
3 V	0.3	Stable	0.66 V
5 V	0.5	Boundary	1.10 V
7 V	0.7	Unstable without ramp	1.54 V
9 V	0.9	Strongly unstable without ramp	1.98 V
10 V	1.0	Worst case ideal limit	2.20 V

Thus, if the kit may operate up to nearly 10 V output, a practical ramp-compensation range of about 0–2.2 V peak-to-peak is appropriate.

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6. Why adding ramp can reduce output voltage

Adding ramp compensation changes the turn-off condition to$$i_L+m_a t=i_{ref}$$iL​+ma​t=iref​

This means the comparator trips before the inductor current itself reaches $i_{ref}$iref​. Therefore, for the same fixed current reference, the switch turns off earlier, the peak current decreases, the average inductor current decreases, and the output voltage drops.

During ON time,$$i_L(t)=i_{valley}+m_1t$$iL​(t)=ivalley​+m1​t

The turn-off condition is$$i_{valley}+m_1t_{on}+m_at_{on}=i_{ref}$$ivalley​+m1​ton​+ma​ton​=iref​

so$$t_{on}=\frac{i_{ref}-i_{valley}}{m_1+m_a}$$ton​=m1​+ma​iref​−ivalley​​

Compared to no ramp,$$t_{on}=\frac{i_{ref}-i_{valley}}{m_1}$$ton​=m1​iref​−ivalley​​

the ON time is reduced by the added ramp.

A useful first-order estimate of the current reduction is$$\boxed{ \frac{i_{avg}}{i_{ref}}\approx \frac{m_1}{m_1+m_a} }$$iref​iavg​​≈m1​+ma​m1​​​

Therefore, for fixed $i_{ref}$iref​,$$\boxed{ \frac{V_{o,\text{with ramp}}}{V_{o,\text{without ramp}}} \approx \frac{m_1}{m_1+m_a} }$$Vo,without ramp​Vo,with ramp​​≈m1​+ma​m1​​​

This predicts the open-loop voltage drop caused by ramp compensation.

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7. Example: $V_o=7\text{ V}$Vo​=7 V

For $V_{in}=10\text{ V}$Vin​=10 V, $V_o=7\text{ V}$Vo​=7 V, and $L=30\mu H$L=30μH,$$m_1=\frac{10-7}{30\mu H}=1.0\times10^5\text{ A/s}$$m1​=30μH10−7​=1.0×105 A/s $$m_2=\frac{7}{30\mu H}=2.33\times10^5\text{ A/s}$$m2​=30μH7​=2.33×105 A/s

Recommended ramp:$$m_a=\frac{m_2}{2}=1.17\times10^5\text{ A/s}$$ma​=2m2​​=1.17×105 A/s

The approximate current gain becomes$$\frac{i_{avg}}{i_{ref}} \approx \frac{1.0\times10^5}{1.0\times10^5+1.17\times10^5} \approx 0.46$$iref​iavg​​≈1.0×105+1.17×1051.0×105​≈0.46

So if $i_{ref}$iref​ is kept fixed, adding this ramp may reduce the average current to roughly 46% of its previous value. The output voltage will drop accordingly unless an outer voltage loop increases $i_{ref}$iref​.

Ramp compensation has two effects:

First, it stabilizes the current loop at high duty ratios by preventing cycle-to-cycle perturbations from growing.

Second, it reduces the effective current-loop gain, so for a fixed current reference the converter delivers less average current and the output voltage may drop.

In open-loop current-reference testing, this drop is expected and can be predicted. In closed-loop voltage regulation, the outer controller compensates by increasing $i_{ref}$iref​ until the desired output voltage is restored. Which we will do in the next lab.

🧰 Required Components

The components needed in this lab are:

• Red Board
• Blue Board
• Oscilloscope
• Signal Generator
• Multimeter
• Current probe (if interested in measuring inductor current)

🎥 Overview Video

This video gives you a quick glimpse of what you can expect from this lab.